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Tuesday nights I have my microprocessors and industrial applications class. Just some background: I have been in this class for around five or six weeks. We are studying the Motorola 68HC11 microcomputer using a Heathkit trainer.
Tuesday we went over the architecture of the microprocessor and specifically delved into two apparently related addressing modes extended and indexed. I understood and understand that the extended addressing mode requires three bytes, but the indexed addressing has caused me quite a lot of discomfort. I understand that there is an opcode and the offset address. I know that you need to add the offset address to the address in the index register to find the operand address, but how the hell do you find the offset address in the first place? Is it related to extended addressing where you have the higher order address and the lower address?
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Re: Help: Indexed addressing mode (MC68HC11A8)
You're making this more difficult than it is. Forget your specific microprocessor. Suppose you want to fetch some value from memory. You have to eventually wind up with the specific address of that value.
You might use a specific address. You might add some base address to some offset. Either or both of those may be located in registers or in memory. You might fetch some address from memory and then use it directly, or modify it with some offset, or use it to fetch another address, and then modify it, or not. Two plus two plus one equals five. Four plus one equals five. Five equals five. The number of operations may vary, but the answer is the same. Some microprocessors will give you fewer options than others. Forget that. Follow the chain that yields the answer. Don't wish you had some way that your microprocessor won't support. Look at the architecture. Read the specifications. Live the code.
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#3 |
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Re: Help: Indexed addressing mode (MC68HC11A8)
So is the offset address always the higher order address of the operand?
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Re: Help: Indexed addressing mode (MC68HC11A8)
Depends on the microprocessor. When an outcome is the result of an addition, it doesn't matter which is which, except for logical reasons. For instance, if you wanted to "walk" memory, you'd want one of the operands incrementable.
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Re: Help: Indexed addressing mode (MC68HC11A8)
Thanks for your help. It clarified the subject a lot. I will post some source that we came up with in the past class. It was interesting to note that one of the trainers might have been a bit wonky while running the program, but a lot of students got the correct result (except for me!). Live and learn.
I do understand indexed addressing a whole lot more now however, seeing that mode for the first time really got me in a twist. The indexed mode is similar to extended in that you have a higher order address. The offset is the start of the index, or array of numbers.
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Re: Help: Indexed addressing mode (MC68HC11A8)
I don't know if the datasheet for the MC68HC11A8 is part of your course material. If not, it would be very useful to you, and you can get it here.
The base device, the 6800, didn't have the addressing modes you have in this device. The direct mode is relatively limited; the extended mode is akin to what better micros of the time referred to as direct mode. This device also borrowed the indexed addressing modes from the Z-80. It's the indexed modes that caused me to comment on the index+offset mode. While the addition of the two values is important, the sizes are different between the two portions. One part may be fixed in the instruction in some chips. In the Z-80 the offset was fixed; only the index register could be incremented. That made it somewhat limited. If one were walking memory, one lost the base while incrementing the index register, thus requiring the base to be saved by pushing it onto the stack or storing it somewhere. The same is true in this chip.
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#7 |
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Re: Help: Indexed addressing mode (MC68HC11A8)
I actually started reading the data sheet, there were a lot of things that I did not understand. There is a lot of interesting stuff however.
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