Hypothetical Processor, Question
 

Right off the bat, I have to say this is a homework question. I've
read the rules about posting homework questions so I will do my best to show you that I have indeed worked over this problem.

To sum it up, my problem is to translate a series of hypothetical assembly instructions into binary.

NOTE: in the process of formatting this post, copying it from notepad has made it look funky

Some rules:

There are four registers: AX, BX, CX, DX

Each instruction can be either 1 byte or 3 bytes.

The first three bits are resigned for translation of the opcode
The next two bits are resigned for the first operand
The next three bits are resigned for the second operand
The last 16 bits are resigned for memory/constants/address/label

example:

Key for translating:
iii (instruction group) --------- mmm(depends on iii)
000 => special ----------------- AX
001 => or --------------------- BX
110 mov reg, /memory/constant [xxxx] <---memory address

mmm (second operand, depend on iii)

rr(first operand)
00 => AX
01 => BX
10 => CX
11 => DX

This is certainly not all of it, but my only problem is with translating an instruction like mov BX, AX.

I get about as far as: 110 01 But I'm at a lose at translating [xxxx],
especially since mov BX, AX is a one byte instruction, giving me only 3
bits to work with.

Thanks in advance for any help.

Your information is terribly incomplete or unclear, one. You don't describe the third set of bits in the opcode at all, or you have them labeled as an operand. A reasonable guess would be:

110 00 001

As I said, I have left out alot of it, but I thought the general idea was conveyed. I did accidentally leave out that the mmm is the second operand or the third set of bits, sorry about that. My question was more about how 'in general' could your represent a memory location as binary when only given 3 bits. If you feel that my information is too incomplete, well then I can just drop it. Being new to Assembly, I may have overestimated the ability of people to understand the snipit of information that I wrote down.

Don't get your shorts in a wad, I'm not the one putting out insufficient information. I would say you're overestimating people's psychic abilities, not their comprehension.

That said, here's the deal: you can't represent a memory location with 3 bits, unless you have very little memory. Registers aren't (normally) memory. They're storage locations local to the uP. If you have 8 of them, you have a pattern of 3 bits sufficient to identify each one individually.

Don't mind DaWei, he's a cranky bastard.

Damn good programmer, but cranky bastard.

(Not that that's a bad thing DaWei :-P)

Alright, I'll keep my shorts out of a wad if you keep your panties un-wadded also. See? I can be condescending also.

Thanks.

I'm expecting sensible rational questions from you, for which I have answers. You're wanting free advice and help without enabling such help. My crystal is in the shop for ball joints. You still got the best answer available with the limited information. My criticism was justified. Your response is puerile. You're unable to be condescending to me -- it implies a relationship you will probably never achieve.

So for MOV BX, AX wouldn't you just have
110 01 000

If you use the same instruction for memory addresses then you could use 100 in the second param to indicate that the instruction is 3 bytes and the 16 bit param is used for a constant, you could then use 101 to indicate a memory address
So MOV BX, 0xBEEF would be something like:
110 01 100 10111110 11101111

and MOV BX, [0xBEEF] would be something like:
110 01 101 10111110 11101111

Be one or the other, but I don't see any indication as to whether it should be mov src, dst or mov dst, src.