Programming Forums - View Single Post

alanlaw · Oct 3rd, 2005, 4:40 AM

Right off the bat, I have to say this is a homework question. I've
read the rules about posting homework questions so I will do my best to show you that I have indeed worked over this problem.

To sum it up, my problem is to translate a series of hypothetical assembly instructions into binary.

NOTE: in the process of formatting this post, copying it from notepad has made it look funky

Some rules:

There are four registers: AX, BX, CX, DX

Each instruction can be either 1 byte or 3 bytes.

The first three bits are resigned for translation of the opcode
The next two bits are resigned for the first operand
The next three bits are resigned for the second operand
The last 16 bits are resigned for memory/constants/address/label

example:

(Toggle Plain Text)

mov DX, 0		110 11 111 0000000000000000

Key for translating:
iii (instruction group) --------- mmm(depends on iii)
000 => special ----------------- AX
001 => or --------------------- BX
110 mov reg, /memory/constant [xxxx] <---memory address

mmm (second operand, depend on iii)

rr(first operand)
00 => AX
01 => BX
10 => CX
11 => DX

This is certainly not all of it, but my only problem is with translating an instruction like mov BX, AX.

I get about as far as: 110 01 But I'm at a lose at translating [xxxx],
especially since mov BX, AX is a one byte instruction, giving me only 3
bits to work with.

Thanks in advance for any help.

Oct 3rd, 2005, 4:40 AM	#1
alanlaw Newbie Join Date: Feb 2005 Posts: 3 Rep Power: 0	Hypothetical Processor, Question Right off the bat, I have to say this is a homework question. I've read the rules about posting homework questions so I will do my best to show you that I have indeed worked over this problem. To sum it up, my problem is to translate a series of hypothetical assembly instructions into binary. NOTE: in the process of formatting this post, copying it from notepad has made it look funky Some rules: There are four registers: AX, BX, CX, DX Each instruction can be either 1 byte or 3 bytes. The first three bits are resigned for translation of the opcode The next two bits are resigned for the first operand The next three bits are resigned for the second operand The last 16 bits are resigned for memory/constants/address/label example: (Toggle Plain Text) mov DX, 0 110 11 111 0000000000000000 mov DX, 0 110 11 111 0000000000000000 Key for translating: iii (instruction group) --------- mmm(depends on iii) 000 => special ----------------- AX 001 => or --------------------- BX 110 mov reg, /memory/constant [xxxx] <---memory address mmm (second operand, depend on iii) rr(first operand) 00 => AX 01 => BX 10 => CX 11 => DX This is certainly not all of it, but my only problem is with translating an instruction like mov BX, AX. I get about as far as: 110 01 But I'm at a lose at translating [xxxx], especially since mov BX, AX is a one byte instruction, giving me only 3 bits to work with. Thanks in advance for any help.