nannu

Hey guys, Im stydying for the final in the class. I have posted for other things. But one of the questions for the review is:
QUESTION:
In a computer instruction format, the instruction length is 11 bits and the size of an address field is 4 bits. Is it possible to have
5 2-address instructions
45 1-address instructions
32 0-address instructions

EXAMPLE:
For the sample I looked at, it shows that it is possible to have
15 instructions with 3 addresses
14 instructions with 2 addresses
31 instruction with 2 addresses
16 instructions with 0 addresses

0000 R1 R2 R3
<----- 15 3 address code
1110 R1 R2 R3

1111 0000 R1 R2
<----- 14 2 address codes
1111 1101 R1 R2

The book tells that there are two ways to set this up.
| | | | | | | | | | | | | | | | | | | | | | | | | |
opcode address 1 address 2 address 3
or
| | | | | | | | | | | | | | | | | | | | | |
opcode address 1

How can I understand the part in red to be able to answer the review question that I posted above. What are the two examples saying.
Thanks in advance

Seif

This is not a C++ problem and really does not belong here.

I'm not familiar with Marie Architecture but at a quick glance it seems to have a good, simple instruction set architecture for beginners to get to grips with.

have a read of this:

http://www.mans.eun.eg/faceng/arabic...S/PDF3/2.2.pdf

you should have a better understanding from that.

Wizard1988

From what I understand this architecture is using fixed length instructions, which are 11 bits long. An address field is four bits long, this means it would be possible to address 2^4 different registers with one address field.

Now here is what you need to understand, the opcode tells you the actual operation and the address fields tell you what registers are being used in the operation (some of those opcodes could be memory operations but that isn't what the question is asking...)

So you have 11 bits that you can use, if you take four bits of that and assign it to be an address you have 7 bits left. The remaining seven bits allow you to encode up to 2^7 different operations (with one address).

If you have two addresses in the instruction then you have 11 - ( 2 *4) bits left for the opcode. meaning that you can now encode only 2^3 different operations.

Hopefully this clears it up a bit.

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